1. Field of the Invention
The invention relates to an integrated data processor for the processing of word-wise receivable data, comprising:
a. a multiplier element (48) featuring a first input having a width of n bits, a second input having a width of at least substantially 2n bits for receiving two operands to be multiplied, and a first output for presenting a product; PA1 b. an arithmetic and logic unit (50) featuring a third input and a fourth input for receiving two further operands, and a second output for presenting a result operand; PA1 c. a read/write memory (32) for the storage of data; PA1 d. a control memory (60, 66) for the storage of control information, and PA1 e. data connection circuits for connecting said components to one another and to the environment. PA1 f. said data connection means comprise internal bus connection means (74) having a bit width which at least equals that of the second input; PA1 g. said first output is coupled over a first full product width to said third input, said second output being coupled to said fourth input over a second full product width via an accumulator register (54); PA1 h. said second output is connected to said bus connection means by way of a multiplexed result register (52); PA1 i. in order to generate data with a bit precision which is substantially higher than the bit width of the second input, the data processor features at its second output parallel-connected more-significant and less-significant registers for connection to a bus connection, between the second output and the fourth input there being provided a shift control element in order to present a provisional product over a multi-bit step, shifting to the less-significant bit position side, back to the arithmetic and logic unit.
2. Description of the Prior Art
A data processor of this kind is disclosed in U.S. Pat. No. 4,511,966 spection assigned to Sony Corporation. Such a processor is notably, but not exclusively suitable for the execution of a variety of operations on data representing digitized acoustic signals, for example, a signals generated during the reproduction of records on which the data is stored in the form of optically detectable deformations in a reflective layer accommodated on a disc which is driven at a uniform rotary speed and which is also referred to as a "Compact Disc". The invention, however, is not restricted to the use with such a storage disc. The value of n is determined by the application in question. Suitable values are, for example 8, 10 or 12 bits. "At least substantially equal to 2n" is to be understood to mean herein a range of values having a lower limit 2n and an upper limit which is determined by the application, for example 2n, 2n+1, 2n+2, but which is definitely smaller than 21/2n.
Data is to be understood to mean herein data which qualifies (can qualify) for further processing; this further processing can take place within the data processor as well as outside the data processor. Control information is to be understood to mean information which is (can be) repeatedly used without modification; it may concern program data as well as coefficient data. In the long term it may sometimes be necessary to modify this control information; the memory may then be a "read mostly" memory having a write cycle which is, for example substantially longer than the read cycle. On the other hand, the program may be stored in a read only memory, the coefficient data being accommodated in a read/write memory. The known data processor has drawbacks. For example, between the multiplier element and the arithmetic and logic unit there is arranged a multiplexer structure which may give rise to throughput problems when different data arrives simultaneously. It has also been found that the precision is inadequate for some applications; for the data supplied via the first and the second input, this precision equals exactly the width (in bits) of the first and the second output, respectively; for the product it is equal to the width of the product output, but never higher than the definition of the widest input.
It is an object of the invention to provide an integrated data processor which allows for flexibility in the operations in the time domain (reduction of contention problems for the data connection means) as well as in the amplitude domain (enabling an increased precision it will be demonstrated that this increased precision can be achieved for the data applied to the multiplier element via the first input as well for the data applied thereto via the second input.